Pascal Sasdrich

Pascal Sasdrich

Emmy Noether
Research Group Leader

Ruhr-Universität Bochum

Biography

I am head of the Emmy Noether research group on “Computer-Aided Verification of Physical Security Properties (CAVE)” at the Chair for Security Engineering, Ruhr-Universität Bochum, Germany.

Before, I worked as a Senior Hardware Security Engineer at the Rambus Cryptography Research Group located in Rotterdam, The Netherlands. I obtained my PhD (Dr.-Ing.) in 2018 on the topic of “Cryptographic Hardware Agility for Physical Protection” under the supervision of Prof. Dr.-Ing. Tim Güneysu at the Ruhr-Universität Bochum, Germany.

My current research focuses on Hardware Security and Secure Design. For this, I work on new concepts and approaches for Hardware Security Verification and Computer-Aided Security to enable efficient and automated protection of hardware implementations through sophisticated and specialized Security-Aware Electronic Design Automation tools.

Interests
  • Hardware Security
  • Computer-Aided Security
  • Cryptographic Engineering
  • Physical Implementation Attacks
Education
  • PhD in Cryptographic Engineering, 2018

    Ruhr-Universität Bochum

  • MSc in IT Security, 2015

    Ruhr-Universität Bochum

  • BSc in IT Security, 2012

    Ruhr-Universität Bochum

Service

Program Chair

Fault Diagnosis and Tolerance in Cryptography (FDTC) – 2023

Editorial Board

Transactions on Cryptographic Hardware and Embedded Systems (IACR TCHES) – 2021, 2022, 2023, 2024

Program Committee

Smart Card Research and Advanced Application (CARDIS) – 2021, 2022, 2023
Constructive Side‐Channel Analysis and Secure Design (COSADE) – 2023
Design, Automation and Test in Europe (DATE) – 2024

Awards

Admission to the Young College of the North Rhine-Westphalian Academy of Science and the Arts

Admission to the Young College is an important distinction for young scientists and artists in North Rhine-Westphalia. Fellows receive an annual stipend of 10,000 € for a period of up to four years.

9th German IT Security Award

1st place (awarded with 100,000 €) for the concept “Simply Secure: A Toolbox for Automated Generation and Evaluation of Protected Hardware” (together with David Knichel, Amir Moradi, Nicolai Müller).

Publications

(2023). Challenges and Opportunities of Security-Aware EDA. ACM Transactions on Embedded Computing Systems.

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(2023). Combined Private Circuits -- Combined Security Refurbished. ACM Conference on Computer and Communications Security (CCS).

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(2023). EasiMask - Towards Efficient, Automated, and Secure Implementation of Masking in Hardware. Design, Automation & Test in Europe Conference & Exhibition (DATE).

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(2023). Recommendation for a Holistic Secure Embedded ISA Extension. Applied Cryptography and Network Security (ACNS).

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(2023). Revisiting Fault Adversary Models - Hardware Faults in Theory and Practice. IEEE Transactions on Computers (TC).

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(2023). Risky Translations: Securing TLBs against Timing Side Channels. IACR Transactions Cryptographic Hardware Embedded Systems (TCHES).

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(2022). Automated Generation of Masked Hardware. IACR Transactions Cryptographic Hardware Embedded Systems (TCHES).

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(2022). CINI MINIS: Domain Isolation for Fault and Combined Security. ACM Conference on Computer and Communications Security (CCS).

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(2022). Generic Hardware Private Circuits Towards Automated Generation of Composable Secure Gadgets. IACR Transactions Cryptographic Hardware Embedded Systems (TCHES).

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(2022). Randomness Optimization for Gadget Compositions in Higher-Order Masking. IACR Transactions Cryptographic Hardware Embedded Systems (TCHES).

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(2022). Transitional Leakage in Theory and Practice Unveiling Security Flaws in Masked Circuits. IACR Transactions Cryptographic Hardware Embedded Systems (TCHES).

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(2022). VERICA - Verification of Combined Attacks Automated formal verification of security against simultaneous information leakage and tampering. IACR Transactions Cryptographic Hardware Embedded Systems (TCHES).

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(2021). A Hard Crystal - Implementing Dilithium on Reconfigurable Hardware. Smart Card Research and Advanced Applications (CARDIS).

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(2021). FIVER - Robust Verification of Countermeasures against Fault Injections. IACR Transactions Cryptographic Hardware Embedded Systems (TCHES).

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(2020). Concurrent error detection revisited: hardware protection against fault and side-channel attacks. International Conference on Availability, Reliability and Security (ARES).

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(2020). Low-Latency Hardware Masking with Application to AES. IACR Transactions Cryptographic Hardware Embedded Systems (TCHES).

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(2020). SILVER - Statistical Independence and Leakage Verification. Advances in Cryptology (ASIACRYPT).

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(2020). SKINNY-AEAD and SKINNY-Hash. IACR Transactions on Symmetric Cryptology (ToSC).

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(2018). Exploring RFC 7748 for Hardware Implementation: Curve25519 and Curve448 with Side-Channel Protection. Journal Hardware and System Security (HASS).

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(2018). Protecting Triple-DES Against DPA - A Practical Application of Domain-Oriented Masking. Constructive Side-Channel Analysis and Secure Design (COSADE).

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(2018). Threshold Implementation in Software - Case Study of PRESENT. Constructive Side-Channel Analysis and Secure Design (COSADE).

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(2017). Bit-Sliding: A Generic Technique for Bit-Serial Implementations of SPN-based Primitives - Applications to AES, PRESENT and SKINNY. Cryptographic Hardware and Embedded Systems (CHES).

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(2017). Hiding Higher-Order Side-Channel Leakage - Randomizing Cryptographic Implementations in Reconfigurable Hardware. The Cryptographers’ Track at the RSA Conference (CT-RSA).

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(2016). A grain in the silicon: SCA-protected AES in less than 30 slices. IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP).

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(2016). The SKINNY Family of Block Ciphers and Its Low-Latency Variant MANTIS. International Cryptology Conference (CRYPTO).

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(2016). White-Box Cryptography in the Gray Box - - A Hardware Implementation and its Side Channels -. Fast Software Encryption (FSE).

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(2015). Achieving side-channel protection with dynamic logic reconfiguration on modern FPGAs. IEEE International Symposium on Hardware Oriented Security and Trust (HOST).

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(2015). Affine Equivalence and Its Application to Tightening Threshold Implementations. Selected Areas in Cryptography (SAC).

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(2015). Implementing Curve25519 for Side-Channel-Protected Elliptic Curve Cryptography. ACM Transactions on Reconfigurable Technology and Systems (TRETS).

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(2015). Side-Channel Protection by Randomizing Look-Up Tables on Reconfigurable Hardware - Pitfalls of Memory Primitives. Constructive Side-Channel Analysis and Secure Design (COSADE).

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(2014). Efficient Elliptic-Curve Cryptography Using Curve25519 on Reconfigurable Devices. Reconfigurable Computing: Architectures, Tools, and Applications (ARC).

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(2014). THOR - The hardware onion router. International Conference on Field Programmable Logic and Applications (FPL).

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