Pascal Sasdrich
© Nordrhein-Westfälische Akademie der Wissenschaften und der Künste |
Bettina Engel-Albustin 2023 (NRW AWK| Engel-Albustin)

Pascal Sasdrich

Emmy Noether
Research Group Leader

Ruhr-Universität Bochum


I am head of the Emmy Noether research group on “Computer-Aided Verification of Physical Security Properties (CAVE)” at the Chair for Security Engineering, Ruhr-Universität Bochum, Germany.

Before, I worked as a Senior Hardware Security Engineer at the Rambus Cryptography Research Group located in Rotterdam, The Netherlands. I obtained my PhD (Dr.-Ing.) in 2018 on the topic of “Cryptographic Hardware Agility for Physical Protection” under the supervision of Prof. Dr.-Ing. Tim Güneysu at the Ruhr-Universität Bochum, Germany.

My current research focuses on Hardware Security and Secure Design. For this, I work on new concepts and approaches for Hardware Security Verification and Computer-Aided Security to enable efficient and automated protection of hardware implementations through sophisticated and specialized Security-Aware Electronic Design Automation tools.

  • Hardware Security
  • Computer-Aided Security
  • Cryptographic Engineering
  • Physical Implementation Attacks
  • PhD in Cryptographic Engineering, 2018

    Ruhr-Universität Bochum

  • MSc in IT Security, 2015

    Ruhr-Universität Bochum

  • BSc in IT Security, 2012

    Ruhr-Universität Bochum


Program Chair
CASCADE – 2024
Fault Diagnosis and Tolerance in Cryptography (FDTC) – 2023
Program Committee
Smart Card Research and Advanced Application (CARDIS) – 2021, 2022, 2023
Constructive Side‐Channel Analysis and Secure Design (COSADE) – 2023, 2024
Design, Automation and Test in Europe (DATE) – 2024
Fault Diagnosis and Tolerance in Cryptography (FDTC) – 2024
Editorial Board
Transactions on Cryptographic Hardware and Embedded Systems (IACR TCHES) – 2021, 2022, 2023, 2024, 2025


INDIANA - Verifying (Random) Probing Security through Indistinguishability Analysis
Formal Definition and Verification for Combined Random Fault and Random Probing Security
Combined Threshold Implementation
HADES: Automated Hardware Design Exploration for Cryptographic Primitives
Challenges and Opportunities of Security-Aware EDA
Combined Private Circuits -- Combined Security Refurbished
EasiMask - Towards Efficient, Automated, and Secure Implementation of Masking in Hardware
Recommendation for a Holistic Secure Embedded ISA Extension
Revisiting Fault Adversary Models - Hardware Faults in Theory and Practice
Risky Translations: Securing TLBs against Timing Side Channels